Content addressable memory (CAM) devices are frequently used in network switching and routing applications to determine forwarding destinations for data packets, and are also used to provide more advanced network Quality of Service (QoS) functions such as traffic shaping, traffic policing, rate limiting, and so on. More recently, CAM devices have been deployed in network environments to implement intrusion detection systems and to perform deep packet inspection tasks.
A CAM device can be instructed to compare a selected portion of an incoming packet with CAM words stored in an array within the CAM device. More specifically, a CAM device includes a CAM array having a plurality of CAM cells organized in a number of rows and columns. Each row of CAM cells, which can be used to store a CAM word, is coupled to a corresponding match line that indicates match results for the row. Each column of CAM cells is typically coupled to one or more data lines or data line pairs that can be used to drive data into a selected CAM row during write operations and/or for providing a search key to the CAM rows during compare operations. During a compare operation, the search key (e.g., the comparand word) is provided to the CAM array (e.g., via compare line pairs associated with columns of the CAM array) and compared with the CAM words stored therein. For each CAM word that matches the search key, a corresponding match line is asserted to indicate the match result, which is typically stored in a match latch associated with the matching CAM row. If one or more of the match lines are asserted, a match flag is asserted to indicate the match condition, and a priority encoder determines the match address or index of the highest priority matching (HPM) entry in the CAM array.
Some CAM devices allow for accessing a segment of CAM cells in an intra-row configurable CAM device. For example, U.S. Pat. No. 6,243,281, which is assigned to the assignee of the present application and is hereby incorporated by reference, discloses a CAM array having a plurality of rows of CAM cells in which each row is segmented into a plurality of row segments. Each row segment includes a plurality of CAM cells coupled to a corresponding match line segment. Address logic coupled to the CAM array uniquely addresses individual row segments in response to first configuration information, and uniquely addresses a group of the row segments in response to second configuration information. The first configuration information is indicative of a first width and depth configuration of the CAM array, and the second configuration information is indicative of a second width and depth configuration of the CAM array.
For the CAM device disclosed in U.S. Pat. No. 6,243,281, all match line segments in each row are typically pre-charged prior to compare operations without regard to the particular width and depth configuration of the CAM array and without regard to match results in previous row segments. During compare operations between comparand data and data stored in the CAM array, if all CAM cells in a row segment match the comparand data, the CAM cells do not discharge the corresponding match line segment, which remains in its charged state to indicate a match condition for the row segment. Conversely, if any CAM cell in the row segment does not match the comparand data, the CAM cell discharges the match line segment to indicate a mismatch condition for the row segment. The discharged match line segments are then pre-charged prior to the next compare operation.
Alternately charging and discharging all match line segments that have a mismatch condition during compare operations may result in significant power consumption. This power consumption increases as the size and/or density of the CAM array increases and, therefore, undesirably limits the memory size and the scalability of the CAM array. To reduce such power consumption, the match line segments of some row segments can be selectively pre-charged in response to match conditions in one or more previous row segments and in response to the particular row configuration of the CAM device, for example, as described in commonly-owned U.S. Pat. No. 7,113,415, which is hereby incorporated by reference. In this manner, if data stored in the CAM cells of a first segment of a CAM row does not match a corresponding portion of the search key (thus resulting in a mismatch condition for the entire row), the match lines in subsequent segments of the CAM row are not pre-charged, thereby reducing power consumption.
Although effective reducing power consumption associated with match line pre-charging, CAM devices disclosed in U.S. Pat. No. 7,113,415 typically drive the search key into all CAM row segments for each compare operation, which consumes significant power. For example, prior to compare operations, each set of compare line pairs in the CAM array are driven to the same predetermined logic level (e.g., to logic high) and then, during compare operations, the search key is provided to the CAM array by driving each pair of complementary compare lines to opposite logic states indicative of the corresponding bit of the search key. Thus, because at least one of each complementary compare pair in the CAM array is charged and discharged for every compare operation, power consumption associated with charging and discharging the compare lines can be significant. Accordingly, there is a need to minimize the power consumption associated with the pre-charging and discharging of the comparand lines in CAM arrays, and to further reduce the power consumption associated with the charging and discharging of the match lines.
Like reference numerals refer to corresponding parts throughout the drawing figures.